ProCurve 5300xl Specifications download pdf (Page 6)

CPU

24 10/100 MACs

4 GbE MACs

Memory

Subsystem

Classifier

Look-up

Programmable

Fabric Interface

Fabric Buffer

Cross Bar Fabric

CPU Interface

Output Memory

Input Memory

Table Memory

Output Memory

Input Memory

Table Memory

Management

CPU

Subsystem

N-Chip

F-Chip

CPU

24 10/100 MACs

4 GbE MACs

Memory

Subsystem

Classifier

Look-up

Programmable

Fabric Interface

N-Chip

9.6 Gbps

backplane link

8 Fabric Ports

...

Output Memory

Input Memory

Table Memory

Output Memory

Input Memory

Table Memory

Figure 1. Detailed Architecture

The ProCurve 5300xl Switch Series have two slots in the back for the load-sharing power

supplies. One power supply ships standard with each switch and can power a fully loaded

chassis. A second power supply can be installed for redundancy and longer overall expected

power supply life.

The ProCurve 5300xl Switch Series can hold up to 16,536 (16K) MAC addresses in the switch

address table.

N-Chip

Each module contains a full ASIC-based Layer 3 routing switch engine. This switch engine,

called the network or N-Chip, provides all the packet processing: Layer 2 and Layer 3 lookups,

filtering and forwarding decisions, VLAN, trunking and priority queuing determinations. The

N-Chip also contains its own CPU.

Classification and Lookup

When a packet first comes in, the classifier section determines the packet characteristics, its

addresses, VLAN affiliation, any priority specification, etc. The packet is stored in input memory,

lookups into the table memory are done to determine routing information and a N-Chip specific

packet header is created for this packet with this information. This header is then forwarded to

the programmable section of the N-Chip.

N-Chip Programmability

As mentioned in the previous section, one of the functions of the N-Chip is to analyze each

packet’s header as it comes into the switch. The packet’s addresses can be read, with the switch

making forwarding decisions based on this analysis. For example, if a packet’s 802.1Q tag

needs to be changed to re-map the packet priority, the N-Chip needs to look at each packet to

see if any particular one needs to be changed. This packet-by-packet processing has to occur

very quickly to maintain overall wire-speed performance. ASICs provide this high performance,

but typically cannot be changed in their functionality once the ASIC design is frozen.

To broaden the flexibility of the N-Chip, a programmable function is included in some areas of

its packet processing. This programmability provides network processor-like capability, giving

the PROCURVE designers the opportunity to make some future changes or additions in the

packet processing features of the ASIC by downloading new software into it. Thus new features

needing high performance ASIC processing can be accommodated, extending the useful life of

the switch without the need to upgrade or replace the hardware.

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ProCurve 5300xl Specifications Page 6

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